OpenJDK / valhalla / valhalla
changeset 5354:30df1bf62cca
6946892: c1 shouldn't sign-extend to upper 32bits on x64
Summary: c1 does sign-extension when it loads ints and shorts from memory to 64-bit registers. This causes problems for c2 because it relies on the fact the int passed in a 64-bit register is zero-extended.
Reviewed-by: never
| author | iveresov |
|---|---|
| date | Tue, 27 Apr 2010 11:19:12 -0700 |
| parents | 30f4b75f8005 |
| children | ff629f00f910 |
| files | hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp |
| diffstat | 1 files changed, 1 insertions(+), 7 deletions(-) [+] |
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--- a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Mon Apr 26 23:59:45 2010 -0700 +++ b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Tue Apr 27 11:19:12 2010 -0700 @@ -1244,8 +1244,7 @@ break; #endif // _L64 case T_INT: - // %%% could this be a movl? this is safer but longer instruction - __ movl2ptr(dest->as_register(), from_addr); + __ movl(dest->as_register(), from_addr); break; case T_LONG: { @@ -1303,7 +1302,6 @@ __ shll(dest_reg, 24); __ sarl(dest_reg, 24); } - // These are unsigned so the zero extension on 64bit is just what we need break; } @@ -1315,8 +1313,6 @@ } else { __ movw(dest_reg, from_addr); } - // This is unsigned so the zero extension on 64bit is just what we need - // __ movl2ptr(dest_reg, dest_reg); break; } @@ -1329,8 +1325,6 @@ __ shll(dest_reg, 16); __ sarl(dest_reg, 16); } - // Might not be needed in 64bit but certainly doesn't hurt (except for code size) - __ movl2ptr(dest_reg, dest_reg); break; }